Press Release
Baya Systems to Showcase Heterogeneous SoC Strategies at Andes RISC-V CON Silicon Valley
Santa Clara, CA – April 28, 2025 – Baya Systems, a pioneer in high-performance system architecture, is set to participate in the upcoming Andes RISC-V CON in Silicon Valley. In collaboration with Imagination Technologies and Andes Technology, Baya’s Chief Software Architect, Dr. Eric Norige, and Imagination’s Director of Product Management, Pallavi Sharma, will lead a technical session titled “Unleashing the Power of Heterogeneous Computing.”
This session aims to explore innovative strategies for optimizing performance in artificial intelligence (AI) and graphics-intensive workloads through effective CPU-GPU interaction. Attendees will gain insights into memory hierarchy, bandwidth allocation, and architectural decisions that influence real-time performance in edge environments.
“The complexity of modern workloads demands architectural agility,” stated Norige, underscoring the importance of analyzing subsystem interactions to maximize performance without unnecessary silicon costs. Utilizing Baya’s CacheStudio™ software, developers will see simulations of cache architectures and memory access patterns that optimize CPU-GPU coherence.
Key highlights from the session include platform-agnostic integration of Imagination’s GPU IP and Andes’ RISC-V cores, as well as live demonstrations modeling AI inference workloads and graphics pipelines. These efforts aim to showcase how developers can minimize latency and power consumption while enhancing throughput.
Pallavi Sharma expressed enthusiasm for the partnership, stating, “By merging our GPU expertise with system-level insights, we empower developers to create scalable RISC-V platforms suited for modern AI and graphics demands.”
The session will occur on April 29, 2025, from 3:30 p.m. to 4:30 p.m. PT at the DoubleTree by Hilton Hotel in San Jose, CA. Interested attendees can register via Eventbrite.
For more information about Baya Systems, visit bayasystems.com.
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